Thin film transistor liquid crystal Display (TFT-LCD) has become one of the most popular and modern information goods. As result of being light, small and portable, having a lower operating voltage, being free of harmful radiation and suited to production on large scale, TFT-LCD substitutes for cathode ray tube display as a caressed computer display device.
In accordance with the structure of TFT-LCD, Drain of TFT has a higher electric field while TFT is operating, and there should be an off-state leakage current resulted while the device is shut down, thereby the application of TFT-LCD being limited.
Presently, someone provides a lightly doped drain structure and a field induced drain structure for preventing TFT-LCD from the off-state leakage current. FIG. 1 illustrates a lightly doped drain structure of the prior art for solving the problem of the off-state leakage current. The structure includes an insulating substrate 11, a source/drain layer 12, a gate insulating layer 13 and a gate layer 14, wherein the source/drain layer 12 further includes a drain 121, a lightly doped drain 1211, a channel 122, a source 123 and a lightly doped source 1231. The electric field of the drain 121 is reduced by means of adding lightly doped regions (i.e. the lightly doped drain 1211 and the lightly doped source 1231) corresponding to the original source 123 and the original drain 121 respectively near the channel 122, so as to prevent from the leakage current. However the TFT-LCD with the lightly doped regions is complex and hard to manufacture. Furthermore the resistance will increases because of the lightly doped degree. As result of the series resistance of the drain 121 and the source 123 increasing, the operating speed of the device reduces and the power dissipation increases.
Moreover, another improving structure of field-induction drain has been disclosed. However it has to add an extra photolithographic process for manufacturing the improving structure. The more photolithographic processes are introduced, the more mis-alignment and infected defects are resulted. Therefore, the cost and the manufacturing time of the improving structure must increase and the yield reduces.
Kim proposed a method of fabricating a thin film transistor (U.S. Pat. No. 5,693,549). In which, relatively complex procedures are disclosed. Firstly, a cap insulation film is formed on the first polysilicon film and a gate is formed by successively photoetching the cap insulation film, the first polysilicon film, and the first gate insulation film in the first method proposed by Kim. Secondly, a cap insulation film is formed on the second polysilicion film and a gate is formed by successively photoetching the cap insulation film, the second polysilicon film, and the first gate insulation film in the second method proposed by Kim. In the present invention, a relatively simpler manufacturing method of thin film transistor is proposed. In which, a gate is formed excluding the steps of: forming the cap insulation film; etching the cap insulating insulation film etc. Besides, the first and the second insulating layers 23 and 25 are formed sequentially thus the first and the second secondary gate insulating layers 251 and 252 are formed right on top of the first insulating layer 23 and the channel 222, and beneath the first and the second secondary gates 271 and 272 as shown in FIG. 2(d) of the present invention. Therefore, the thickness of the insulating layers between the first and second secondary gates 271 and 272 and the channel 222 (23+25) are relatively twice the thickness of a single insulating layer (23/25). Thus, the off-state leakage current of a thin film transistor would be relatively lower due to the relatively thicker gate insulating layer between the secondary gates (271 and 272) and the channel (222). However, there is no such a thicker gate insulating layer proposed in the '549 Patent since there is only a second gate insulating film (25/35) between the supplementary gates (26-1 and 26-2/36-1 and 36-2) and the channel (21-2 and 21-3/31-1 and 31-2) as shown in FIGS. 3 and 5 of the '549 Patent. Lastly, the secondary gate insulating layers layer 25 is formed around the primary gate 24 and has the effects of the cap insulation film of the '549 Patent thus there is no need of growing a cap insulating film in the present invention. From the above-mentioned descriptions and analyses, one could draw a conclusion that the '549 Patent did not anticipate the present invention. Furthermore, the manufacturing costs relate to the present invention would be relatively lower than those of the '549 Patent due to the relatively simpler manufacturing method.
Hikida et al. proposed a manufacturing method of a semiconductor device (U.S. Pat. No. 5,620,914) and Choi et al. disclosed a method of forming a junction field-effect transistor (U.S. Pat. No. 4,700,461). The proposed method in the '914 Patent is for manufacturing a semiconductor device having a lightly doped drain (LDD) structure. Thus, the purposes of these two cited references are different from that of the present invention (a manufacturing method of thin film transistor) firstly. In the '914 Patent, two implanting procedures (of impurity) are included and a source and drain region is formed at the last step to form the LDD structure, but in the present invention, only one implanting procedure (of impurity) is included and a source/drain layer is formed at the second step to form the thin film transistor secondly. In the '461 Patent, the proposed method of forming a junction field-effect transistor includes the step of: forming two closely spaced regions of opposite conductivity in the doped island of silicon (pSi 18) which is employed to form two n+ regions (22) to be operated with the n++ regions of source (36) and drain (34) to form a structure (as described in claim 1 and as shown in FIG. 1 of '461 Patent) similar to the aforementioned structure including a lightly doped drain 1211, a channel 122, a source 123 and a lightly doped source 1231 in the prior art, and the manufacturing method of the thin film transistor proposed in the present invention includes a relatively simpler method (with a relative simpler structure) having a step of forming a source/drain layer (which includes a source, a drain, and a channel regions) but excluding such steps of: forming the lightly doped drain and the lightly doped source instead. Thus, the present invention could not be disclosed, taught, and suggested by the '914 Patent in view of the '461 Patent. By the same token, the manufacturing costs relate to the present invention would be relatively lower than those of the '914/'461 Patents due to the relatively simpler manufacturing method.
Hence, the present invention is attempted to overcome the drawbacks of the prior arts and provides a manufacturing method of a thin film transistor for preventing TFT-LCD from the leakage current.